ECE-470/670 Digital Design II - Fall 2011

Course info
Syllabus: please read it!
ECE-470, Digital Design II, 3 credits
Prereq: ECE 375 with a grade of C or better.
Lecture: TuTh 2:00-3:15pm in ECE-243

Instructor
Cristinel Ababei, cristinel.ababei(at)ndsu.edu
Ph: 701-231-7617
Office: ECE-101F
Office hours: Tuesday 10:30-11:30am, Thursday 1:00-2:00pm or by appointment.

Bulletin description
Design and analysis of reliable digital systems through robust information coding, fault avoidance, and fault tolerance.
 
Textbook and recommended references
M. Bushnell and V. Agrawal, Essentials of Electronic Testing for Digital Memory and Mixed-Signal VLSI Circuits, Springer 2000. (required)
Miron Abramovici, Melvin A. Breuer, and Arthur D. Friedman, Digital Systems Testing and Testable Design, Wiley-IEEE Press, Revised edition, 1994.
Laung-Terng Wang, Cheng-Wen Wu, and Xiaoqing Wen, VLSI Test Principles and Architectures - Design for Testability, Elsevier, 2006.
 
Course objectives
This course examines in depth theories and techniques for testing multimillion transistor VLSI chips. The overall course objective is to teach electrical and computer engineering students the fundamental concepts of testing and reliability, methods of modeling and analysis of faults, and design for testability of digital circuits and systems. Specific objectives include the following:
1.  Develop an understanding of test economics, failure mechanisms in VLSI circuits, and characterization of failures at various levels of circuit hierarchy.
2.  Develop an understanding of reliability issues of VLSI circuits.
3.  Utilize logic and fault simulation to develop test vector generation algorithms for combinational and sequential circuits.
4.  Design testing methodologies for memory chips.
5.  Utilize design for testability techniques including built-in self-test (BIST), scan design, and boundary scan.
6.  Coordinate different testing tasks (combinational testing, sequential testing, memory testing, BIST, scan testing, etc.) so that a chip is tested as a whole entity.
7.  Apply theoretical knowledge about algorithms to solve testing problems using a computer.
8.  Use data structures and algorithms in C++ programs that are used to create testing software tools.
9.  Use VHDL/Verilog to specify digital circuit structure and behavior and Altera FPGA development boards for testing.
10. Conduct literature survey on specific research topics, identify current challenges, and develop solutions.
11. Prepare informative and organized project reports and presentations that describe the methodologies employed, the results obtained, and the conclusions made in simulation experiments.

Grading
Grade breakdown: A=[90-100], B=[80-90), C=[70-80), D=[60-70).
--  Final grade components:
    - Exam 1: 25%
    - Exam 2 (final): 25%
    - Homework: 15%
    - Projects: 35%