Lecture notes

Lecture 1: FPGAs (field programmable gate arrays)
-- Light introduction to FPGAs: lec01_fpga_intro_part1.pdf
-- FPGA Details, Slides: lec01_fpga_details_part2.pdf
-- Readings:
   [1] DE2-115 User Manual
   [2] DE1-SoC User Manual
   [3] Basics of Reconfigurable Computing

Lecture 2: Introduction to Quartus II Software via Examples
-- Example #1: Simple four bit adder circuit (structural vs. behavioral) - lec02_fourbit_adder.pdf (VHDL files in table at the bottom!)  
-- Example #2: Edge detection circuit of rising edge (Mealy vs. Moore FSMs) - lec02_edge_detector_mealy_moore.pdf, block diagram  
-- Example #3: Fourbit counter (structural vs. behavioral) - lec02_fourbit_counter.pdf 
-- Readings:
   [1] Pong P. Chu, FPGA Prototyping by VHDL Examples, Wiley, 2008. (Chapters 1,2,3)
   [2] VHDL Primer at Penn State (very nice first exposure to VHDL concepts)
   [3] Supplemental material for lecture 2: lec02_supplemental_VHDL.pdf 
   [4] Links related to VHDL tutorials on dejazzer's EE-478 website

Lecture 3: Concepts of VHDL (from A to Z)
-- VHDL Basics (entity, behavioural, structural): lec03_a_VHDL_intro.pdf
-- Concurrent and sequential statements (component, concurrency, process): lec03_b_conc_seq.pdf
-- Combinational and sequential circuits I (muxes, coders, decoders, registers, counters, FSMs): lec03_c_sequential_1.pdf
-- Sequential circuits II (FSMs, if-then-else, case, for-loop, wait, etc.): lec03_d_sequential_2.pdf
-- Functions, Procedures, Packages: lec03_e_packages_1.pdf, lec03 e_packages_2.pdf, lec03_e_packages_3.pdf
-- VHDL coding for synthesis: lec03 f_coding_for_synthesis.pdf

Lecture 4: More on FSMs: ASM, FSMD, ASMD
-- Finite State Machine with Datapath (FSMD): lec04_fsmd.pdf  
-- Example #4: Fibonacci number circuit - See lec04_fsmd.pdf
-- Example #5: Period counter - See lec04_fsmd.pdf
-- Example #6: Division circuit - See lec04_fsmd.pdf
-- Example #7: Binary to BCD converter - See lec04_fsmd.pdf
-- Example #8: Accurate low-frequency counter - See lec04_fsmd.pdf
-- Example #9: Fourbit multiplier - See lec04_fsmd.pdf
-- Readings:
   [1] Pong P. Chu, FPGA Prototyping by VHDL Examples, Wiley, 2008. (Chapters 4,5,6)
   [2] Samary Baranov, Algorithmic State Machines and Finite State Machines

Lecture 5: VHDL Simulation. Testbenches
-- Aldec Active-HDL Simulator and Testbenches: lec05_aldec_simulator.pdf  
-- More on Testbenches: lec05_testbenches.pdf  
-- More on FSMs: lec05_more_on_FSMs.pdf  
-- Example #10: Testbench for fourbit adder circuit -- See above lec05 notes for description
-- Example #11: BCD to Excess-3 converter -- See section 3 of lec05_more_on_FSMs.pdf for description 
-- Example #12: Bit difference calculator -- See section 4 of lec05_more_on_FSMs.pdf for description   
-- Readings:
   [1] Pong P. Chu, FPGA Prototyping by VHDL Examples, Wiley, 2008. (Chapters 7...13)

Lecture 6: Additional examples
-- Example #13: Using UART on DE2-115 FPGA board 
-- Example #14: Cool digital clock on DE2-115 FPGA board 
-- Example #15: Mano's single-cycle computer (SCC); see also D2L for more details
-- Example #16: Simple digital camera on DE2-115 FPGA board 

Lecture 7: Tutorial on creating HPS+FPGA systems
-- Example #17: Getting up to speed with DE1-SoC board: HPS+FPGA systems; see D2L for downloadable archive with several HPS+FPGA systems

Here is a compact list of all examples with complete or partial VHDL source code discussed throughout the above lectures:
Id
Example
Description
VHDL files
1
Fourbit adder 
lecture #2
fourbit_adder_vhdl.zip
fourbit_adder_vhdl_behavioral.zip
2
Edge detection circuit of rising edge lecture #2
edge_detection_vhdl.zip
3
Fourbit counter
lecture #2
fourbit_counter_vhdl.zip
fourbit_counter_vhdl_behavioral.zip
4
Fibonacci number circuit
lecture #4
lecture #4
5
Period counter
lecture #4 lecture #4
6
Division circuit
lecture #4 lecture #4
7
Binary to BCD converter
lecture #4
8
Accurate low-frequency counter
lecture #4 lecture #4
9
Fourbit multiplier
lecture #4
10
Testbench for fourbit_adder lecture #5
fourbit_adder_testbench_vhdl.zip
11
BCD to Excess-3 converter
lecture #5 bcd_to_excess3_converter_vhdl.zip
12
Bit difference calculator lecture #5
bit_difference_calculator_vhdl.zip
13
Using UART on DE2-115 FPGA board
lecture #6 uart_test_impl1.zip
14
Cool digital clock on DE2-115 FPGA board lecture #6 cool_digital_clock_impl1.zip
15
Mano's single-cycle computer (SCC) on Atlys board (Xilinx's ISE WebPack project)
lecture #6 single_cycle_computer_SCC.zip
16
Simple digital camera on DE2-115 FPGA board lecture #6 digital_camera_impl1.zip
17
Several HPS+FPGA systems
lecture #7
lecture7_HPS_FPGA_examples.zip