EECE-4740/5740 Advanced VHDL and FPGA Design
Spring 2023 


Course info
EECE-4740/5740 Advanced VHDL and FPGA Design, 3 credits
Prereq: EECE 2030, EECE 3015
Lecture: Tue, Thu, 9:30-10:45AM, Haggerty 388 
Webpage: D2L site: http://d2l.mu.edu

Instructor
Cristinel Ababei, cristinel.ababei@marquette.edu
Phone: 414-288-5720
Office: Haggerty Hall 220
Office hours: Tue, Thu 11-11:50AM or stop by any time

For course description, objectives, policies, and a tentative outline please see the Syllabus.

Previous editions of this course
Spring 2022
Examples of selected projects: Clock and stop watch combined, 64x64 RGB matrix display, Black Jack adviser.
Spring 2021
Examples of selected projects: Tic-tac-toe, Guitar pedal, Dual player pong game, Whac-a-mole, Musical keyboard, Simon says.
Spring 2020
Examples of selected projects: Tetris, PONG 2.0, Snake Game, Abstract Art Generator, FPGA-based signal generator.
Spring 2019
Examples of selected projects: RSA on FPGA; CrisCoin cryptocurrency; Blackjack card counter; Camera controlled game; FPGA platformer; Bop it; FM synthesizer; Chinese numbers recognition on FPGA.
Spring 2018
Examples of selected projects: reaction timer; stop watch; magic mirror; ANN for basic logic gates; memory game; tone matrix; bluetooth remote for laptop; hands free lights switch; tuner on audio frequency.
Spring 2017
FPGA Mandelbrot:
Generate Mandelbrot fractals on DE2-115 development board and display them on an VGA monitor.
Spring 2016
Three different projects implemented using the DE1-SoC board:
1) Voicilloscope: voice controlled oscilloscope (DE1-SoC board, bluetooth, Android app with voice recognition and display of signals); Photo1, Photo2
2) Harry Potter Weasley clock: if a Harry Potter fan, then you know what I mean! :-) (De1-SoC board, ESP01 with ESP8266 WiFi module, internet server, Android and iPhone apps for location capture and recording to server); Photo1, Photo2
3) Snoopy, server monitoring with FPGAs: internet traffic monitor; (HPS+FPGA system on DE1-SoC, Linux, Ethernet, security, VGA monitor); Photo1
In addition, the digital camera project from last year, 2015, was used to develop a senior design project (SDP), which implemented the Viola Jones face detection algorithm entirely on the DE2-115 board. Details and a video demonstration of it can be found on the Hardware webpage: http://www.dejazzer.com/hardware.html
Spring 2015
Digital camera implemented on DE2-115; used OV7670 CMOS sensor; SDRAM memory storage; grey filter; edge detection;


Here is an additional video that showcases the edge detection in video mode:


Spring 2014
Basic Network-on-Chip (NoC) prototyping on FPGAs; implemented on DE2-115 and ZedBoard.